Typical JFET power-supply voltages are comparable to those with bipolar transis-tors. The voltage between the source and drain, abbreviated ED, can range from about3 V to 150 V; most often it is 6 V to 12 V.The biasing arrangement in Fig. 23-4A is commonly used for weak-signal ampli-fiers, low-level amplifiers and oscillators. The scheme at B is more often employed inpower amplifiers having a substantial input signal.Voltage amplificationThe graph of Fig. 23-5 shows the drain (channel) current, ID, as a function of the gatebias voltage, EG, for a hypothetical N-channel JFET. The drain voltage, ED, is assumedto be constant.420 The field-effect transistor23-4Two methods of biasing an N-channel JFET. At A, fixed gate bias; atB, variable gate bias.