7.3.3 Noise Model of the CMOS Transistor

Chapter 7.3.3 Noise Model of the CMOS Transistor

Radio Frequency Integrated Circuit Design Second Edition Book
Pages 534
Views 5,528
Downloads : 6 times
PDF Size : 6.8 MiB

Summary of Contents

Radio Frequency Integrated Circuit Design Second Edition Book

  • 190 LNA Designwe will see how to set the actual input impedance so that it is also equal to 50W, making it feasible to match both power and noise simultaneously. The expression for Bopt can be simplified if rb is small compared to 1/2gm. This would be a reasonable approximation over most normal operating points: optBCπω= - (7.65)Thus, it can be seen that the condition for maximum power transfer (resonat-ing out the reactive part of the input impedance) is the same as the condition for providing optimal noise matching. Hence, the method in the next section can be used for matching an LNA.7.3.3  Noise Model of the CMOS TransistorA similar procedure can be followed as for the bipolar transistor with similar re-sults. For bipolar transistors, the noise sources were collector shot noise current, base shot noise current, and base resistance noise voltage. For the CMOS transis-tor, similar noise sources are the drain channel noise current, gate induced noise current, and gate resistance noise voltage as shown in Chapter 4 and repeated in Figure 7.13. By going through the same steps, or by directly comparing noise at the input due to the various noise sources, the following expression can be derived for noise figure of a simple NMOS common source amplifier: 215gLGm ssm STrrg RFRg Rγδωω+æö= +++ç÷èø (7.66)where rLG is the series resistance of inductor LG.This derivation has been simplified by assuming that the common source con-figuration has a high input impedance; hence, drain channel noise is reflected back to the input using voltage only. After impedance matching as discussed in the fol-lowing sections, the above equations for noise are no longer quite correct as the gain is modified by the impedance matching circuit. A modified equation for noise Figure 7.13  Noise model for the CMOS transistor.