100 A Brief Review of Technology4.12.4 ESD Protection and Antenna RulesTransistor performance can be affected by the need to have protection against elec-trostatic discharge or ESD. ESD can be the result of external factors such as static charge. It can also be the result of processing steps, such as plasma etching. When a significant amount of metal is attached to a gate, processing of that metal during fabrication can result in charge buildup on the gate and ultimately the destruction of the gate even before the circuit is delivered back to the designer. Such failures can be avoided by limiting the total area of metal relative to the gate area, or by adding protection circuitry such as diodes to the substrate. Rules to avoid such breakdown of gate oxides are called antenna rules.References  Taur, Y., and T. H. Ning, Fundamentals of Modern VLSI Devices, Cambridge, U.K.: Cam-bridge University Press, 1998.  Plummer, J. D., P. B. Griffin, and M. D. Deal, Silicon VLSI Technology: Fundamentals, Practice, and Modeling, Upper Saddle River, NJ: Prentice-Hall, 2000.  Sedra, A. S., and K. C. Smith, Microelectronic Circuits, 5th ed., New York: Oxford Univer-sity Press, 2004.  Terrovitis, M. T., and R. G. Meyer, “Intermodulation Distortion in Current-Commutating CMOS Mixers,” IEEE J. of Solid-State Circuits, Vol. 35, No. 10, October 2000, pp. 1461–1473.  Roulston, D. J., Bipolar Semiconductor Devices, New York: McGraw-Hill, 1990.  Streetman, B. G., Solid-State Electronic Devices, 3rd ed., Englewood Cliffs, NJ: Prentice-Hall, 1990.  Muller, R. S., and T. I. Kamins, Device Electronics for Integrated Circuits, New York: John Wiley & Sons, 1986  Sze, S. M., High Speed Semiconductor Devices, New York: John Wiley & Sons, 1990.  Sze, S. M., Modern Semiconductor Device Physics, New York: John Wiley & Sons, 1997. Cooke, H., “Microwave Transistors Theory and Design,” Proc. IEEE, Vol. 59, August 1971, pp. 1163–1181.  Lee, T. H., The Design of CMOS Radio-Frequency Integrated Circuits, 2nd ed., Cam-bridge, U.K.: Cambridge University Press, 2004. Dickson, T. O., et al., “The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks,” J. Solid-State Circuits, Vol. 41, No. 8, August 2006, pp. 1830–1845.Figure 4.26 Common-centroid arrangement of M1 and M2 reducing the effect of processing varia-tions in either x or y directions.