4.11.2 PMOS Transistor Operation

Chapter 4.11.2 PMOS Transistor Operation

Radio Frequency Integrated Circuit Design Second Edition Book
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Radio Frequency Integrated Circuit Design Second Edition Book

  • 90 A Brief Review of Technologyand remains nearly independent of vDS. This means the output conductance gds is relatively low, which is advantageous for high gain in amplifiers.4.11.2  PMOS Transistor OperationThe operation of PMOS is similar to that of NMOS except that negative vGS is applied. This attracts holes, to form a conducting p channel. The characteristic curves for PMOS and NMOS are similar if the absolute value is taken for current and voltage.4.11.3  CMOS Small-Signal ModelThe small-signal model is shown in Figure 4.17. As described in Section 4.11, the current also depends on the voltage from source to substrate—that is, if the source voltage is higher than the substrate voltage, total current is reduced. Such situations would arise in cascode structures, or in a differential pair. The decrease of current due to a nonzero source to substrate voltage, known as the body effect, is modeled by a second current source controlled by vsb. As described in Section 4.11 for tran-sistors in a common substrate, the substrate is biased at the most negative voltage for a p-substrate and at the most positive voltage for an n-substrate. However, if a transistor is placed in its own well, as is standard for PMOS transistors or for NMOS transistors in a triple well, the source can safely be connected to the sub-strate and the body effect can be eliminated. As with bipolar transistors, some simplistic equations for calculating model parameters will now be shown. In the saturation region of operation, the current is often described by the simple square law model: ox2() (1)2DSGSTDSCWivVvLµλæö=-+ç÷èø (4.26)where m is the carrier mobility, Cox is the gate capacitance per unit area, and VT is the threshold voltage. l, the output slope factor, is sometimes described using K, a constant depending on doping concentration, and f0, the built-in open circuit volt-age of silicon [8], as follows: 2()DSGSToKL VVVλ =--+ F (4.27)Figure 4.17  Small-signal model for a CMOS transistor. Note the model will be identical for either a PMOS or NMOS device.