4.11 CMOS Transistors 89even if the source is not grounded. Triple well devices are highly desirable for RF applications because of the low transconductance of CMOS devices under even the best circumstances.4.11.1 NMOS Transistor OperationThe drain characteristic curves for an NMOS transistor are similar to the curves for an npn bipolar transistor and are shown in Figure 4.16. When a positive voltage is applied to the gate of the NMOS device, electrons are attracted towards the gate. With sufficient voltage, an n channel is formed under the oxide, allowing electrons to flow between the drain and the source under the control of the gate voltage vGS. Thus, as gate voltage is increased, more electrons are attracted to the gate surface increasing the electron density, hence the current is increased. For small applied vDS, with constant vGS, a current flows between drain and source due to availability of electrons in the channel. For very low vDS, the relationship is nearly linear as the channel acts like a resistor. For sufficiently large vDS, the channel dimensions at the drain side is reduced to nearly zero as shown in Figure 4.14. The drain voltage at this point is defined as VDsat. For larger vDS, the drain-source current is saturated Figure 4.15 Triple well NMOS transistors. Typically, source and p-well (local substrate) are con-nected, the n-well is connected to the most positive voltage and the (global) p- substrate is con-nected to the most negative voltage.Figure 4.16 CMOS transistor curves. Note values inside the absolute value signs will be positive for NMOS transistors and negative for PMOS transistors.