8.2.3 Sample-and-Hold Amplifiers

Chapter 8.2.3 Sample-and-Hold Amplifiers

Physics Lecture Notes – Phys 395 Electronics Book
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Physics Lecture Notes – Phys 395 Electronics Book

  • CHAPTER 8. DATA ACQUISITION AND PROCESS CONTROL1598.2.3Sample-and-Hold AmplifiersThe purpose of the sample-and-hold amplifier is to freeze an analog voltage at the instant theHOLD command is issued and make that analog voltage available for an extended period.Figure 8.1 shows various ways of converting three analog input signals to digital signals foracquisition by a single digital n-bit bus.8.2.4Gated Charge-to-Voltage AmplifierThe gated charge-to-voltage amplifier is designed specifically as an integrating amplifier tomeasure the area under a narrow pulse. Its capacitor must be discharged before a newsample can be taken. If the initial charge on the capacitor is zero, then the output voltagefrom the amplifier follows the gate signal. This sampling amplifier is normally used withpulsed signals when the area under the signal is of primary interest. The entire signal isintegrated and the output is insensitive to the details of the signal shape.If the signal pulse rides on a relatively constant but nonzero offset voltage, the effectof the offset can be determined by generating a gate when no signal pulse is present. Theresulting output voltage is known as a pedestal and can be subtracted from the data signalat a later point in the system.8.2.5ComparatorThe comparator is used to provide a digital output indicating which of two analog inputvoltages is larger. It is a single bit analog-to-digital converter. The comparator is verysimilar to an operational amplifier but has a digital true/false output. Since the comparatoris basically an amplifier, the op-amp schematic symbol is used, but to avoid confusion thesymbol C may be inserted inside the op-amp symbol.8.3OscillatorsOften the need arises for some type of repetitive signal to serve as a timing reference forvarious logic or control functions. This need is served by a constant-frequency square waveoscillator.8.3.1Application to Interval TimersWith increasing system complexity, the need may arise for several repetitive timing signalswith different periods. If each timing signal is obtained from a separate oscillator, the signalswill have a random and variable phase relationship. They will be asynchronous and may leadto glitches. A better technique is to use one high-frequency oscillator with a short periodand from it derive all longer-period signals. If the longer period is a multiple of two of theclock period a counter with flip-flops can be used. If the period is not a multiple of two ofthe clock period a divide-by-N counter can be used.