7.8 Two-State Storage Elements

Chapter 7.8 Two-State Storage Elements

Physics Lecture Notes – Phys 395 Electronics Book
Pages 176
Views 3,686
Downloads : 13 times
PDF Size : 906.7 KiB

Summary of Contents

Physics Lecture Notes – Phys 395 Electronics Book

  • CHAPTER 7. DIGITAL CIRCUITS148At any time only one gate may drive information onto the bus line but several gates mayreceive it. In general, information may flow on the bus wires in both directions. This typeof bus is referred to as a bidirectional data bus.7.8Two-State Storage ElementsAnalog voltage storage times are limited since the charge on a capacitor will eventually leakaway. The problem of discrete storage reduces to the need to store a large number of two-state variables. The four commonly used methods are: 1) magnetic domain orientation, 2)presence or absence of charge (not amount of charge) on a capacitor, 3) presence or absenceof an electrical connection and 4) the DC current path through the latches and flip-flops ofa digital circuit. We will discuss only the latter.7.9Latches and Un-Clocked Flip-FlopsIt is possible using basic logic gates to build a circuit that remembers its present condition.It is also possible to build counting circuits. The basic counting unit is the flip-flop (FF).7.9.1LatchesAll latches have two inputs: data and enable/disable. And typically Q and Q outputs. Aones-catching latch can be built as shown in figure 7.17.When the control input C is false, the output Q follows the input D, but when the con-trol input goes true, the output latches true as soon as D goes true and then stays thereindependent of further changes in D.One of the most useful latches is known as the transparent latch or D-type latch. Thetransparent latch is like the ones-catching latch but the input D is frozen when the latch isdisabled. The operation of this latch is the same as that of the statically triggered D flip-flopdiscussed below.7.9.2RS and RS Flip-FlopsThe RS flip-flop (RSFF) is the result of cross-connecting two NOR gates as shown in fig-ure 7.18. The RS inputs are referred to as active ones.The ideal flip-flop has only two rest states, set and reset, defined by QQ = 10 and QQ = 01,respectively.A very similar flip-flop can be constructed using two NAND gates as shown in figure 7.19.The RS inputs are now active zeros.These FFs are often referred to as the set/reset type and are un-clocked.