7.4.5 Signal Race

Chapter 7.4.5 Signal Race

Physics Lecture Notes – Phys 395 Electronics Book
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Physics Lecture Notes – Phys 395 Electronics Book

  • CHAPTER 7. DIGITAL CIRCUITS139NAoB+NBoANBoANAoBNBNABAFigure 7.4: A mechanization of the exclusive-OR directly from the truth table.90%10%50%50%tttpdtVAQFigure 7.5: The transition time of the input and output signals, and the propagation delaythrough a gate.7.4.5Signal RaceSignal racing is the condition when two or more signals change almost simultaneously. Thecondition may cause glitches or spikes in the output signal as shown in figure 7.6. The effectsof these glitches can be eliminated by using synchronous timing techniques. In synchronoustiming the glitches are allowed to come and go, and the logic state changes are initiated bya timing pulse (clock pulse).7.4.6Half and Full AddersFrom basic gates, we will develop a full adder circuit that adds two binary numbers. Consideradding two 2-bit binary numbers X1X0 and Y1Y0. X0 + Y0 = C1Z0, where C1 is the carrybit. The truth table for all combinations of X0 and Y0 is shownintable7.5.From the truth tableZ0 =X0· Y0 + X0· Y 0 = X0⊕ Y0(7.30)C1 =X0· Y0(7.31)