6.3.3 Voltage and Current Offsets

Chapter 6.3.3 Voltage and Current Offsets

Physics Lecture Notes – Phys 395 Electronics Book
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Physics Lecture Notes – Phys 395 Electronics Book

  • CHAPTER 6. OPERATIONAL AMPLIFIERS1276.3.3Voltage and Current OffsetsSince op-amps are generally DC coupled, there will appear a nonzero output even when theinputs are grounded or connected to give no input signal. The voltage offset is the result ofslightly different transistors making up the differential input stage. The voltage offset canbe reduced by using an externally-adjustable bias resistor (voltage offset null circuitry).The current offsets at the inverting and non-inverting input terminals are usually basecurrents into two identical bipolar transistors. Thus their difference can be expected to bemuch less than either base current alone. Using this fact the student should be able toexplain the reason for having an extra resistor between the non-inverting input and groundfor the inverting amplifier. The resistor should have a value equal to the input resistor andfeedback resistor in parallel.We define the following:output offset voltage – The voltage at the output when the input voltage is zero (inputterminals grounded).common mode voltage – The voltage at the output when the voltage at the inverting andnon-inverting inputs are equal.common mode rejection ratio (CMRR) – The ratio of the op-amp gain when operating indifferential mode to the gain when operating in common mode.common mode rejection (CMR) – The ability to respond to only differences at the inputterminals: CMR≡ 20 log10(CMRR).6.3.4Current Limiting and Slew RateThe presence of resistance at the output of the op-amp limits the current that the amplifiercan deliver into a load, as shown in figure 6.33. Current limiting is a nonlinear property thatinvalidates the two normal approximation rules. When an op-amp is driven into a current-limiting condition it goes into saturation and becomes a constant current source. For a largeload the output signal will be voltage-limited. A similar breakdown of the rules occurs whenthe amplifier is driven into voltage-limited operation.The op-amp performance can be demonstrated by applying a step function to the inputand observing the output response, as shown in figure 6.33b. The actual output will havea finite slope (slew rate) and overshoot the final voltage value. It then approaches the finalvoltage either exponentially or with some damped ringing. The slew rate and overshoot arenonlinear effects. The settling time after amplifier saturation is defined as the time betweenthe edge of the applied step function and the point where the amplifier output settles towithin some stated percentage of the target voltage value.