CHAPTER 6. OPERATIONAL AMPLIFIERS1276.3.3Voltage and Current OﬀsetsSince op-amps are generally DC coupled, there will appear a nonzero output even when theinputs are grounded or connected to give no input signal. The voltage oﬀset is the result ofslightly diﬀerent transistors making up the diﬀerential input stage. The voltage oﬀset canbe reduced by using an externally-adjustable bias resistor (voltage oﬀset null circuitry).The current oﬀsets at the inverting and non-inverting input terminals are usually basecurrents into two identical bipolar transistors. Thus their diﬀerence can be expected to bemuch less than either base current alone. Using this fact the student should be able toexplain the reason for having an extra resistor between the non-inverting input and groundfor the inverting ampliﬁer. The resistor should have a value equal to the input resistor andfeedback resistor in parallel.We deﬁne the following:output oﬀset voltage – The voltage at the output when the input voltage is zero (inputterminals grounded).common mode voltage – The voltage at the output when the voltage at the inverting andnon-inverting inputs are equal.common mode rejection ratio (CMRR) – The ratio of the op-amp gain when operating indiﬀerential mode to the gain when operating in common mode.common mode rejection (CMR) – The ability to respond to only diﬀerences at the inputterminals: CMR≡ 20 log10(CMRR).6.3.4Current Limiting and Slew RateThe presence of resistance at the output of the op-amp limits the current that the ampliﬁercan deliver into a load, as shown in ﬁgure 6.33. Current limiting is a nonlinear property thatinvalidates the two normal approximation rules. When an op-amp is driven into a current-limiting condition it goes into saturation and becomes a constant current source. For a largeload the output signal will be voltage-limited. A similar breakdown of the rules occurs whenthe ampliﬁer is driven into voltage-limited operation.The op-amp performance can be demonstrated by applying a step function to the inputand observing the output response, as shown in ﬁgure 6.33b. The actual output will havea ﬁnite slope (slew rate) and overshoot the ﬁnal voltage value. It then approaches the ﬁnalvoltage either exponentially or with some damped ringing. The slew rate and overshoot arenonlinear eﬀects. The settling time after ampliﬁer saturation is deﬁned as the time betweenthe edge of the applied step function and the point where the ampliﬁer output settles towithin some stated percentage of the target voltage value.